SS Handheld Game Console

I am an undergraduate college student from the US who enjoys working with radio and DSP projects. I usually work with my radio license to stay in contact with other Hams across the States. This project is a huge reach out of my regular working space, and my biggest FPGA project yet.

The SS Handheld Console is an open-source handheld game console built around a Lattice ECP5 FPGA that runs a custom hybrid 2D and 3D graphics engine. It targets DS-era style gameplay at a locked 60 fps, with a GBA-class tile and sprite engine running right next to a perspective-correct textured 3D rasterizer, both composited to a 4.3" 480x272 panel. Most open-source consoles are 2D only, and the ones that reach for 3D usually render it in software and can't maintain high frame rates. This one does textured, lit, fogged 3D and full 2D compositing in hardware on a single FPGA, and holds 60. The whole bitstream builds with an open toolchain of Yosys, nextpnr, and Project Trellis, so there's no proprietary EDA anywhere in the flow.

The graphics engine is custom Verilog. Its 3D core extends RasterIX, an open-source fixed-function OpenGL-ES rasterizer licensed GPL-3.0, into a gaming-oriented hybrid GPU with a 2D PPU, a scanline compositor, a 32-bit SDRAM subsystem, and display scanout. RasterIX is fully credited, and because the engine inherits its GPL-3.0 terms, all of the gateware stays open. The work is split across two chips, with the STM32H723 handling game logic and 3D geometry and streaming screen-space work to the ECP5 over a parallel bus, and the ECP5 handling rasterization, 2D, compositing, and scanout.

(1) 3D Rasterizer test (2) Compositor RTL Test

The design is validated end to end in simulation and synthesis. It fits the LFE5U-85F (caBGA-381) with decent headroom, running about 34% logic, 72% block RAM, and 80% DSP. Both clock domains close timing, with the GPU domain at 73.5 MHz against a 66.67 target and the SDRAM domain at 174 MHz against a 133 target, and the build is pinned to a deterministic place-and-route seed so it's repeatable.

The full pipeline is pixel-exact in Verilator simulation. The rendered test frames in the repository include textured, lit, and fogged 3D, DS-style alpha-blended multi-layer scenes, and a 2048-triangle stress scene running at roughly 100 fps, comfortably past the 60 fps target.

(1) 2048-tris stress-test

The board is a complete 6-layer PCB in KiCad. It carries the ECP5-85 FPGA and the STM32H723 MCU, 32-bit SDRAM, the 4.3 inch RGB panel with a boost-driven backlight, microSD, USB-C charging, stereo audio, and tactile controls. It's all through-hole vias right now, which is a large point of contention in its production. The repository already includes the full KiCad project, 3D board renders, the schematics as a PDF, a 6-layer layout PDF, and a 76-line bill of materials. The BOM has generic elements for passive components but holds exact parts for the major components like memory and processors.

(1) Board Top (2) Board Bottom

Two things would take this from a validated design to a working prototype, and both are where PCBWay's capability makes the difference:

• The first is blind and buried vias. The ECP5 is a 0.8 mm-pitch, 381-ball BGA, and with only through-hole vias the escape routing swiss-cheeses the power and ground planes that feed the 133 MHz SDRAM and the FPGA core. Blind and buried vias allow a clean BGA escape with uncompromised power integrity. v0.1 is through-hole on purpose, and the design moves to a blind-via stackup on approval.
• The second is professional assembly. Reliably reflowing a 381-ball 0.8 mm BGA is well beyond my capabilities for hand-assembly, and it's the one thing standing between my design and a board that can be powered on. Professional assembly is what makes the demonstrator possible, so the console can prove FPGA-accelerated, console-level rendering works on real silicon.

I also plan to make an enclosure once the prototype functions, so PCBWay's support in production and assembly of prototypes would greatly increase the possibility of this becoming a fully-fledged open-source console and a breakthrough for the retro community.

I already reserved space on the silkscreen for a PCBWay logo. Alongside that, the build comes with a full write-up and high-quality photos of the assembled board, and the whole open-source project, hardware and RTL, stays public for the community. The result is an open-source FPGA console that does DS-era 3D at 60 fps, built and assembled with PCBWay, and a clear demonstration of what your assembly capability makes possible for independent hardware. As for the open-source repository, everything is already up. The full open-source RTL graphics engine, the KiCad hardware project with 3D board renders, the schematics PDF and 6-layer layout PDF, a grouped BOM, and the simulation testbenches with the RTL-rendered proof-of-concept frames are all there to look through. Link is https://github.com/badaboombox/SS-Handheld-Console.