A 28 Pin DIP EEPROM/EPROM/RAM emulator based on Lattice ICE40UP5K FPGA, this board can be used as development board as well.

The 8Bit data bus is voltage translated from 3.3V IO FPGA power to the external voltage thru a dedicated buffer IC.

The addresses and control pins are wired using 1K resistors.

The diode that is shown in the photo as manually soldered is a 3.3V zenner diode in parallel with the onboard 3.3V regulator to limit the voltage if the board is used with 5V power input due to the fact that all inputs when are in 1' state will rise the 3.3V power rail thru input resistors and internal FPGA protection diodes.

As a general development board the addresses and control pins can be independently set as inputs, outputs, tri-state, with pull up's, the data buss can be set only all inputs or all outputs at once due to the voltage translate IC.

The board can use a CH330N or the USB CDC serial client can be integrated directly into the design if is desired and are resources available for that.

The firmware and the design fro the FPGA with the PC control software are in progress.

THE THICKNESS OF THE BOARD NEED TO BE 0.8MM FOR THE USB-C CONNECTOR TO BE USED, IF IS THICKER OR THINNER THAN 0.8MM THE USB-C CONNECTOR WILL BE TO LOOSE OR WILL NOT ENTER AT ALL