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PI and PDN in High-Speed and High-Density PCBs

by: Dec 06,2018 1100 Views 0 Comments Posted in PCB Design & Layout


One of the signs of the development of digital IC technology is that the feature size of transistors becomes smaller and smaller. With the continuous progress of very deep submicrometer technology, the integration degree of digital IC is getting higher and higher, the speed is getting faster and faster, the power consumption is getting larger and larger, and the core power supply voltage is getting lower and lower. This trend will continue for quite some time.


PI (Power Integrity) and PDN (Power Distribution/Delivery Network):

Generally, PDN refers to the entire power system that provides power for active circuits on PCB. It is composed of all interconnections from VRM (voltage regulator module) to the metallization of pads and die on IC that are used to locally supply power current and return current. These include VRM, bulk decoupling capacitors, vias, traces, the plane of the PCB, the additional capacitors of the PCB, the welding balls or leads of packaging, and the interconnection of packaged to the PCB, wire bonds or C4 soldering balls, and IC itself. In high-speed PCB, a pair of adjacent complete copper layers are respectively set as power and ground, which forms a power/ground pair, also known as the power bus. On high density and high speed PCB, the common power/ground pairs provide power for several IC chips. According to the structural characteristics of PDN, the impedance of PDN is not zero, and it changes with the change of current spectrum. By studying the basic circuit structure and working process of digital IC, it can be known that when digital IC works, switching current will be formed, and SSN (Simultaneous Switching Noise) will be generated. PDN can be regarded as a simple circuit that provides power supply to IC through series connection of PDN impedance and IC impedance. Power voltage fluctuation is caused by switching current through PDN impedance, which forms the power ripple. The size of power ripple is related to switching current and PDN impedance.


Therefore, a good PDN system should have the following characteristics:

1)     Provide constant power supply voltage to the load.

2)     Do not transmit the AC noise generated by the load.

3)     The AC impedance between the power and the ground is zero.

However, the PDN system in practical application should meet the following basic requirements:

1)     Keep the voltage constant between chip soldering disks.

2)     Minimize ground bounce.

3)     Try to avoid the problem of EMI.


Estimation of Target Impedance of PDN:

The impedance of PDN is closely connected with the transient power supply current spectrum of digital IC. In some designs, there are as many as 10 kinds of power supply voltages. The power supply voltage, power ripple index, working condition and transient power current spectrum of different IC may be different. Therefore, the target impedance of PDN (and the maximum allowable impedance of PDN) of different IC is different. The design objective of PDN is that the impedance of PDN is lower than the target impedance within the current spectrum of the transient power supply. For example, on one hand, if it is higher than the target impedance, it would result in excessive ripple index of the power supply, on the other hand, if it is significantly lower than the target impedance, it would also unnecessarily increase the design cost. Therefore, it is important and complex to determine the target impedance of PDN.


As for the digital products nowadays and in the future, it will be an inevitable trend that PI becomes more and more important and the target impedance of PDN becomes lower and lower. PI almost depends on PDN, while PDN is closely connected with the specific circumstances of products because every product has its own PDN requirements which is unique. The target of PDN design is that the impedance of PDN is lower than the target PDN impedance within the range of transient power current spectrum.

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