Designing printed circuit boards today is more difficult than ever because of significantly increased density, higher lead free process temperature requirements, and associated changes required in manufacturing. Many changes have taken place throughout the entire supply chain regarding the use of hazardous materials and the requirements for recycling. The RoHS and REACH directives have caused many suppliers to the industry to change their materials and processes.
Below are some common PCB challenges:
Plated Through Hole (PTH) Barrel Cracking: The dominant failure mode in PTHs tends to be barrel fatigue. Barrel fatigue is the circumferential cracking of the copper plating that forms the PTH wall. It is driven by differential expansion between the copper plating (~17 ppm) and the out-of-plane coefficient of thermal expansion (CTE) of the printed board (~70 ppm).
Plated Through Hole Cracking
Strain & Flexure: Pad Cratering: Pad cratering is cracking initiating within the laminate during a dynamic mechanical event such as In circuit testing (ICT), board depanelization, connector insertion, shock and vibration, etc.
Some of the drivers for pad cratering include:
•Finer pitch components
•More brittle laminates
•Stiffer solders (SAC vs. SnPb)
•Presence of a large heat sink
Pad cratering is difficult or impossible to detect using standard procedures such as X-ray, dye-n-pry, ball shear, and ball pull.
Strain and Flexure: Pad Cratering
Conductive Anodic Filament (CAF)
PCB Conductive Anodic Filaments (CAF): CAF is also referred to as metallic electro-migration. It is an electro-chemical process which involves the transport (usually ionic) of a metal across a nonmetallic medium under the influence of an applied electric field. CAF can cause current leakage, intermittent electrical shorts, and dielectric breakdown between conductors in printed wiring boards.
CAF Formation
Laminate Selection
Laminate Selection is frequently under specified. Some common issues seen:
•PCB supplier frequently allowed to select laminate material
•No restrictions on laminate changes
•Generic IPC slash sheet requirements used
•Laminates called out by Tg only and with no measurement method specified (there is more than one)
•No cleanliness requirements specified
•Failure to specify stackup
Since not all laminates are created equal, failure to put some controls in places opens the door to failure.
Plated Through Vias (PTV’s) Design
A Plated Through Via (PTV) is an interconnect within a printed circuit board (PCB) that electrically and/or thermally connects two or more layers. PTVs are part of a larger family of interconnects within PCBs. Designing reliable PTVs depends on PTH Architecture(height / diameter), PCB Material (modulus / CTE), and Plating (thickness / material).
Cleanliness
Contamination and cleanliness issues are believed to be some of the primary drivers of field failures in electronics today. They can induce corrosion and metal migration (electrochemical migration – ECM).
Incoming PCB cleanliness is critical. Cleanliness testing is commonly performed using ROSE (resistivity of solvent extracted) or Omega-Meter method (ionic cleanliness, NaCl equivalent). Consider cleanliness requirements in terms of IC (ion chromatography) test for PCB assemblies since this method identifies both the amount of contamination and what the contamination is composed of. Most importantly, control cleanliness throughout the process from start to finish.
Surface Finish Selection
The selection of the surface finish to be used on your PCBs could be the most important material decision made for the electronic assembly. The surface finish influences the process yield, the amount of rework necessary, field failure rate, the ability to test, the scrap rate, and of course the cost.
One can be lead astray by selecting the lowest cost surface finish only to find that the total cost is much higher. The selection of a surface finish should be done with a holistic approach that considers all important aspects of the assembly.
