The gate driver circuit has been redesigned to mitigate electromagnetic interference (EMI) issues. To improve isolation, the ground plane on the high-side (driver side) has been removed, thereby increasing electrical clearance and reducing parasitic ca pacitance between the low-side and high-side circuits. This modification minimizes unintended conductive and capacitive coupling paths, preventing noise from propagat ing across the isolation barrier. Additionally, a proper PCB cutout has been introduced around the gate driver to further enhance creepage and clearance distances, improving overall EMI robustness. However, these changes introduce certain trade-offs. The removal of the ground plane can lead to poorly defined return paths, increasing loop area and potentially contributing to EMI. It may also increase parasitic inductance in the gate drive loop, resulting in switching noise and ringing. To address these challenges, it is recommended to use split ground planes for high-side and low-side sections while maintaining adequate clearance, minimize the gate drive loop area through short and closely routed traces, apply selective copper removal only in high dv/dt regions, and place decoupling capacitors close to the gate driver supply pins to ensure a tight current loop. Overall, the redesign improves isolation and reduces capacitive coupling, but careful attention is required to control loop inductance and maintain proper return paths to achieve optimal EMI performance.