PCBWay 3rd PCB Design Contest

RISCV Bringup board for IC Validation and ATE Testing

We are working on validation of recent Tape out chips by NECRL in San Francisco State University . We have a RISC V processor and one multi benchmark IC which would be tested for functionality . We will be testing the two chips for their functionality and use these chips for various application and research in future.


The Chip in designed using Verilog RTL. Our task would be to test the chip along with an FPGA to verify that the chip is working properly after manufacturing. The design of chip was done in Synopsys ICC2 and Design Compiler. The PCB is design used KiCAD PCB tools.


The chip would be mounted on this PCB board and connected with an FPGA where we will send Opcodes to the processor . The PCB contains a chip socket (details given in the BOM) and BNC connectors to the power supply. A FMC connector is used to connect the FPGA to the chip . The PCB has 4 layers where inner layers are used for Power and Ground connection. The entire design runs on 5 V and can consume upto 5W of power based on the operation . Hence the trace for power supply are 2mm wide on an average. Since the chip socket is dense with pins , the trace widht is very small as the IO of a chip do not consume much current and has buffers to drive internal circuits.








The above diagram is a virtual simulation of the chip using various opcodes.

Our goal is to get this wave form using the chip on the PCB and verify with the simulators results.


This is a research project and would be my Master's thesis. I request PCBway to sponsor this board design so that I can sucessfully demonstrate my design and help other students to develop their research strategies using this board. It would be a great sucess if this PCB is manufactured sucessfully for my University and PCBWay and we can expect more such projects based on IC testing.


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May 10,2020
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