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High-frequency PCB design in the process of the power supply noise analysis and countermeasures

by: Feb 25,2014 1025 Views 0 Comments Posted in Engineering Technical

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In the high-frequency PCB board , the more important class of interference is the power supply noise. The author of the high frequency power supply noise characteristics and PCB board appeared systematic analysis of the causes , combined with engineering applications , made ​​some very effective and simple solution.

Power supply noise analysis

Power supply noise is defined by self-generated or induced by noise interference . Its interference in the following areas:

1 ) the distribution of power inherent noise caused by impedance . High-frequency circuits , power supply noise greater impact on high-frequency signals . Therefore , the first power supply needs to have low noise . Clean land and clean power is equally important. Power features shown in Figure 1.


As can be seen from Figure 1, the power supply is not ideal case the impedance , noise and therefore it does not exist . However , the actual case of power is a certain impedance and the impedance of the power distribution , therefore, the noise will be superimposed on the power supply . So it should be possible to reduce the impedance of the power supply , preferably with dedicated power and ground planes . In the high-frequency circuit design, the design of the power supply in the form of layers generally higher than in the form of bus design is better , so that the circuit can always go along the path of least resistance . Further , the power supply circuit board to have a signal generating and receiving all signals of the PCB, so that the signal circuit can be minimized , thereby reducing noise.

2 ) Common mode field interference . Refers to the power and ground noise , it is because of interference caused by the common-mode voltage caused by the common reference surface loops and a power supply circuit is formed by the interference , which depends on the relative values ​​of the electric and magnetic fields of strength to be. Figure 2 .


On the channel , down Ic common mode voltage will cause a current in the series circuit , the impact receiving portion . If the magnetic field is dominant , the value of common-mode voltage generated in the series circuit is :


The (1) ΔB formula is the amount of change of magnetic induction , Wb/m2; S is the area , m2.

If the electromagnetic field , it is known when the value of the electric field , the induced voltage is


(2 ) generally applies to L = 150 / F or less , F is the wave frequency MHz.

The author 's experience is : If you exceed this limit, the maximum induced voltage calculation can be simplified as :


3 ) differential mode field interference . Refers to the power and interference between the input and output power cord . In the actual PCB design , I found that its share in the power supply noise in a small proportion , and therefore can not be discussed here .

4 ) inter- line interference . Refers to the interference between the power line . Between the two there is a parallel circuit of different mutual inductance and the capacitor C M1-2 , if the interference source circuit voltage VC and current IC, the circuit appears in the interference were :

a. via capacitive coupling impedance voltage


( 4 ) Formula is in interference RV value of the resistor circuit and the proximal end of the distal end of the parallel resistor .

b. inductively coupled through a series resistor


If the source of interference in common mode noise , the general performance of the interference between the cable common mode and differential mode in two forms.

5 ) Power line coupling . Refers to the AC or DC power cord from electromagnetic interference, power line interference to these phenomena in turn transmitted to other devices . This is the power of the high frequency noise interference indirectly circuit . It should be noted that: noise power is not necessarily generated by its own , it may be induced noise outside interference , then this noise with noise superimposed itself up ( radiated or conducted ) to interfere with other circuits or devices.

Measures to eliminate power supply noise interference

Different manifestations of the power supply noise and its causes for the above analysis can be targeted to destroy the conditions of its occurrence , can effectively suppress interference power supply noise . The solution are:

1 ) Note that the board through hole. So that the power layer through holes etched openings need to make room to pass through the hole . And if the opening is too large power planes , is bound to affect the signal circuit , the signal was forced to bypass the loop area increases, the noise increase , but if some signal lines are concentrated in the vicinity of the opening , sharing this period of the loop , common impedance will lead crosstalk. Referring to Figure 3 .


2 ) connecting lines need enough ground . Each signal requires its own proprietary signal circuits , and signal and loop the loop area as small as possible , which means that the signal to be parallel with the circuit .

3 ) Place the power supply noise filter. It can effectively suppress internal power supply noise immunity and improve system security . And it is a two-way radio frequency filter , both filter out noise from the power line is introduced (to prevent interference with other devices ) , can filter out the noise generated by itself ( to avoid interference with other devices ) , the common-mode interference series mode were inhibitory effect .

4 ) Power Isolation Transformers . Plug the power cable loop or common mode signal ground loop separately it on the high-frequency common mode loop current generated in effective isolation.

5 ) Power regulator. Regain a more clean power , to a large extent reduce the size of the power supply noise .

6 ) cabling. Power input and output lines at the edge of the cloth should be avoided dielectric plate , otherwise prone to radiation, interference with other circuits or devices.

7 ) to separate analog and digital power supply . High-frequency devices are generally very sensitive to digital noise , so the two should be separated from the power supply at the entrance together . If the signal to cross the analog and digital two parts , you can place a loop in the signal across the Department to reduce the loop area . Figure 4.


8 ) apart to avoid overlap between the different power level . Try to stagger , otherwise easily supply noise coupling through the parasitic capacitance of the past .

9 ) isolate sensitive components. Some elements , such as phase-locked loop (PLL) is very sensitive to power supply noise , so they should as far as possible away from the power supply.

10 ) Place the power cord. To reduce the signal circuit , the power cord can be placed by the side of the signal line to achieve a reduction in noise , shown in Figure 5 .


11 ) In order to prevent the accumulation of noise power supply noise on the circuit board and the external interference caused by power supply , you can ( except in the interference path of the radiation ) and a bypass capacitor connected to ground , so the noise can be bypassed to ground to avoid interference with other equipment and devices.


Power supply noise is directly or indirectly generated from the power supply , and the circuit interference in suppressing effect on the circuit , it should follow a general principle , that is: on the one hand , to prevent possible power supply noise on the impact of the circuit, on the other hand , we must minimize the impact of external power supply or circuit , in order to avoid deterioration of the noise power .

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