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Design considerations for a vco audio project

by: May 28,2021 1879 Views 4 Comments Posted in Engineering Technical

Summary:       Brief overview of the design considerations for the analog frontend of a digital VCO

General description

During the past month I’ve been slowly gathering information and designing a VCO’s architecture based on the specifications stated on my last post. Here’s a reminder:

  • Inputs
  • CV 1V/octave
  • FM in
  • Gate in
  • PWM in
  • Output
  • Dual configurable audio outputs.
  • Other features
  • Display LEDs for each audio input/output for visual feedback and for menu selection with the encoder.

With the basic features defined, I made a basic block diagram of the system:

With this I started to look around for components. The first component was the microcontroller. To me this was easy, I knew that I wanted to use a STM32 microcontroller because I really like their tools and the workflow. I chose the STM32F103RCT6.

Here’s a quick summary:

  • Core: ARM® 32-bit Cortex®-M3 CPU
  • 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
  • Single-cycle multiplication and hardware division
  • Memory
  • 256kBytes Flash
  • 48kBytes SRRAM
  • 3 × 12-bit, 1 s A/D converters (up to 21 channels)
  • DMA: 12-channel DMA controller
  • Up to 13 communication interfaces
  • Up to 2 × I2C interfaces (SMBus/PMBus)
  • Up to 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
  • Up to 3 SPIs (18 Mbit/s), 2 with I2S interface multiplexed
  • CAN interface (2.0B Active)
  • USB 2.0 full speed interface
  • SDIO interface

This should be plenty enough for this project. In terms of buses we have a lot of flexibility with at least one I2S bus for the external DAC, SPI or I2C for the external ADC, and others for added functionality, if needed.

Next I started looking for the external ADC and DAC for the VCO, and the main adsasdsad was price. For these I’ve chosen Arrow mostly because of the free DDP DHL shipping that is perfect for low value purchases. Here are the chosen components:

  • PCM1781DBQR
  • 24-Bit Resolution
  • Analog Performance (VCC
  • Dynamic Range: 106 dB
  • SNR: 106 dB, Typical
  • THD+N: 0.002%, Typical
  • Full-Scale Output: 3.9 Vp-p, Typical
  • Hardware Control (PCM1781):
  • I2S and 16-Bit Word, Right-Justified
  • Digital De-Emphasis
  • Soft Mute
  • Zero Flag for L-, R-Channel Common Output

  • MCP3204
  • 12-bit resolution
  • Four single-ended inputs
  • SPI interface
  • ±1 LSB DNL
  • ±1 LSB INL
  • 100 ksps sample

Input stages

On eurorack there’s a lot of different standards on output and input voltages and polarities, and for me, this part took me a while to discover what was the best options in terms of compatibility with other modules available commercially. So here are the values for the input and output signals I ended up choosing:

  • Outputs
  • 10Vpk-pk
  • Inputs
  • Pitch CV (V/octave): 0-10V
  • FM: -5/5V
  • PWM CV: 0-10V
  • Gate: 5V

The next task was to design the signal conditioning needed between the inputs and the ADC, and the outputs and the DAC.

First, the inputs. I will be using a voltage reference of 4.096V for the ADC, so the maximum voltage should not exceed that.

All of the input conditioning circuits use the TL074. All of the input conditioning circuits feature two stages: first a gain stage followed by a buffer stage.

Both of the stages are built around inverting opamp configurations in order to reduce noise.

Here’s the basic template for the inputs:

The Pitch CV and the PWM CV inputs have the same characteristics, so let’s analyze them first.

We need to convert 0-10V to 0-4.096V.

The first stage gain can be set by choosing R1 and R2 according to the following expression:

The best configuration I could find was

I end up with an error of 0.586% on R2 comparing to the theoretical value of 40.96kΩ. I don’t think this will be a major issue, but only testing will tell.

For the buffer stage, the resistor values just need to be the same. On the buffer stage, a 1nF capacitor was added on the feedback path to reduce high frequency noise.

Here’s the final configuration:

For the FM input, the input stage is similar to the previous one except for the additional potentiometer on the input side to control the input offset.

Output Stages

The PCM1781DBQR DAC outputs a 0-5V signal. At the output of the DAC channels, 10uF decoupling capacitors are added in series. After that, as per the datasheet recommendation, a 2nd order Butterworth filter is added. For this I used the Filter Pro software. I chose an fc of 20kHz. I am not sure if that’s the best option for a audio output but lowering that in order to archive more attenuation on higher frequencies didn’t seem right.

More information about this on this Burr-Brown application note

Here are the results from the Filter Pro software:

After this stage we have a output signal that ranges from -2.5 to 2.5V, so the next we just need to add a gain stage.

After lookin at other designs, I’ve also added “In-the-loop compensation” in order to decouple the output from parasitic resistances and capacitances that may be couple to the output (i.e. long wires).

More info here and here.

Using the same formulas from the input stage, the chosen resistor ratio was 50k/100k.

With this, the analog part of the design is complete. On the next post I will describe the digital part of the circuit and the design details of the PCB.

More information can be found in my github here.

Here is a sneak peak of the final PCB:

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