I used a 0.25mm pad size blind via on a BGA pad with a 0.25mm size. I set a 0.1mm B/B stagger clearance in the physical constraints, but I am still getting a DRC error: "Minimum blind/buried via stagger distance top constraint value: 0.1mm, actual value: 0mm." How can I solve this error in Allegro?
| Ranking | Name | Answers |
|---|---|---|
| 1 | PCBWay Team | 8 |
| 2 | Scott Kipp | 1 |
