In general, the following points can be controlled.
1 Select vias reasonable size. For 8-20 layer PCB design, the choice of 6/10Mil (drilling / pad) vias better, for some high-density small size of the board, you can also try using vias 3/6Mil's. Under the current technical conditions, smaller vias more difficult to achieve. For the power supply or ground vias can consider using a larger size to reduce impedance.
2 Using a relatively thin CCL help reduce parasitic had two holes.
Board signal traces 3.PCB try not to change layer, ie try not to use unnecessary vias.
4 power and ground pins to the nearest hole played the lead through the hole and the pin between the shorter the better, because they will lead to an increase in inductance. At the same time the power and ground leads as possible crude to reduce impedance.
5 is placed around a number of ground vias in the signal conversion layer vias, in order to provide the most recent signal circuit. You can even put some extra lot of ground vias on the PCB.
Of course, the design also needed flexible. Through-hole model discussed above is the case each pad are also sometimes, we can reduce or even pad to remove some of the layers. Especially in the through-hole density is very large, may result in the formation of the copper layer laid down in a slot cut off the circuit to solve this problem in addition to the position over the hole, we can also consider the shop via the copper layer The pad size is reduced.
